TOM 1- Silicon Photonics and Guided-Wave Optics

Location: 
Delft, Netherlands
Duration: 
8 October 2018 - 12 October 2018

Chair:

Graham Reed,
University of Southampton (UK)

 

Synopsis

The focus of this topical meeting is to explore new trends and applications, particularly, in the field of Silicon Photonics, but also in Guided-Wave Optics and related areas. The applications range from devices for data centre applications to Mid Infrared (MIR) sensing. New developments on fibre and planar waveguide lasers, fibre non-linearities, nanophotonic materials and devices will also be welcome. Potential topics include, but are not limited to, the design, simulation, modelling and fabrication of optical interconnects, (all) optical (on chip) routing architectures and technologies, as well as related design concepts for high speed, low power photonic integrated circuits (PICs). Also (CMOS-compatible) optical sources and detectors and the optimization of light emission and absorption for data processing using materials such as SiGe TaO5, SiN or III/IVs etc. are welcomed. Advanced monolithic and hybrid processing techniques for the fabrication of photonic structures will also be considered. Finally, devices and strategies for the advancement of PICs in silicon and other materials, including advances in testing and packaging would also be welcome.


Topics include

  *   Design, simulation, modelling and fabrication of optical interconnects
  *   (All) optical (on chip) routing architectures and technologies
  *   MIR devices, sensors and photonic circuits
  *   on-chip light sources
  *   Passive alignment
  *   Low cost methods for lasers on-chip
  *   Low power optical modulators
  *   Related design concepts for high speed, low power photonic integrated circuits (PICs)
  *   (CMOS-compatible) optical sources and detectors
  *   Advanced monolithic and hybrid processing techniques for the fabrication of photonic structures
  *   Devices and strategies for the advancement of PICs in silicon and other materials (including advances in testing and packaging )
  *   Hybrid and monolithic integration on silicon platforms
  *   Strategies for wafer scale testing
  *   Strategies for coupling to and from photonic circuits
  *   Athermal device design